Detailed Description

PROGRAMMABLE COMMUNICATION INTERFACE (PCI) BUS

The Programmable Communication Interface (PCI) data bus is a single wire multiplexed network used for vehicle communications on many DaimlerChrysler Corporation vehicles. Multiplexing is a system that enables the transmission of several messages over a single channel or circuit between various microprocessor-based electronic control modules. The PCI data bus exceeds the Society of Automotive Engineers (SAE) J1850 Standard for Class B Multiplexing.

Many of the electronic control modules in a vehicle require information from the same sensing device. In the past, if information from one sensing device was required by several controllers, a wire from each controller needed to be connected in parallel to that sensor. In addition, each controller utilizing analog sensors required an Analog/Digital (A/D) converter in order to "read" these sensor inputs. Multiplexing reduces wire harness complexity, sensor current loads and controller hardware because each sensing device is connected to only one controller, which reads and distributes the sensor information to the other controllers over the data bus. Also, because each controller on the data bus can access the controller sensor inputs to every other controller on the data bus, more function and feature capabilities are possible.

In addition to reducing wire harness complexity, component sensor current loads and controller hard-ware, multiplexing offers a diagnostic advantage. A multiplex system allows the information flowing between controllers to be monitored using a diagnostic scan tool. The DaimlerChrysler system allows an electronic control module to broadcast message data out onto the bus where all other electronic control modules can "hear" the messages that are being sent. When a module hears a message on the data bus that it requires, it relays that message to its microprocessor. Each module ignores the messages on the data bus that are being sent to other electronic control modules.

Data exchange between modules is achieved by serial transmission of binary encoded messages over a single wire broadcast network. The PCI bus circuit is identified as D25 and the wire colors used for the PCI data bus circuits are yellow with a violet tracer, or violet with a yellow tracer, depending upon the application. The modules are wired in parallel. Connections are made in the harness using splices.

The following modules are used on 2001 Neon:
- Airbag Control Module
- Left Side Impact Airbag Control Module
- Right Side Impact Airbag Control Module
- Controller Antilock Brake
- Powertrain Control Module
- Radio
- CD Changer
- Remote Keyless Entry Module
- Sentry Key Immobilizer Module
- Transmission Control Module (If equipped)
- Mechanical Instrument Cluster




The PCI data bus messages are carried over the bus in the form of Variable Pulse Width Modulated (VPWM) signals. The PCI data bus speed is an average 10.8 Kilo-bits per second (Kips). By comparison, the prior two-wire Chrysler Collision Detection (CCD) data bus system is designed to run at 7.8125 Kips.

Since there is only voltage present when the modules transmit and the message length is only about 500 milliseconds, it is ineffective to try and measure the bus activity with a conventional voltmeter. The PCI data bus can be monitored using the DRB III scan tool. It is possible, however, for the bus to pass all DRB III tests and still be faulty if the voltage parameters are all within the specified range and false messages are being sent. The preferred method is to use the DRB III lab scope function. The 12V square wave selection on the 20-volt scale provides a good view of the bus activity. Voltage on the bus should pulse between zero and about seven and a half volts. Refer to the figure for some typical displays.

The voltage network used to transmit messages requires biasing and termination. Each module on the PCI data bus system provides its own biasing and termination. Each module (also referred to as a node) terminates the bus through a terminating resistor and a terminating capacitor. There are two types of nodes on the bus. The dominant node terminates the bus through a 1 KW resistor and a 3300 pF capacitor. The Powertrain Control Module (PCM) is the only dominant node for the PCI data bus system. A standard node terminates the bus through an 11 KW resistor and a 330 pF capacitor.

The modules bias the bus when transmitting a message. The PCI bus uses low and high voltage levels to generate signals. Low voltage is around zero volts and the high voltage is about seven and one-half volts. The low and high voltage levels are generated by means of variable-pulse width modulation to form signals of varying length. The Variable Pulse Width Modulation (VPWM) used in PCI bus messaging is a method in which both the state of the bus and the width of the pulse are used to encode bit information. A "zero" bit is defined as a short low pulse or a long high pulse. A "one" bit is defined as a long low pulse or a short high pulse. A low (passive) state on the bus does not necessarily mean a zero bit. It also depends upon pulse width. If the width is short, it stands for a zero bit. If the width is long, it stands for a one bit. Similarly, a high (active) state does not necessarily mean a one bit. This too depends upon pulse width. If the width is short, it stands for a one bit. If the width is long, it stands for a zero bit.

In the case where there are successive zero or one data bits, both the state of the bus and the width of the pulse are changed alternately. This encoding scheme is used for two reasons. First, this ensures that only one symbol per transition and one transition per symbol exists. On each transition, every transmitting module must decode the symbol on the bus and begin timing of the next symbol. Since timing of the next symbol begins with the last transition detected on the bus, all of the modules are re-synchronized with each symbol. This ensures that there are no accumulated timing errors during PCI data bus communication.

The second reason for this encoding scheme is to guarantee that the zero bit is the dominant bit on the bus. When two modules are transmitting simultaneously on the bus, there must be some form of arbitration to determine which module will gain control. A data collision occurs when two modules are transmitting different messages at the same time. When a module is transmitting on the bus, it is reading the bus at the same time to ensure message integrity. When a collision is detected, the module that transmitted the one bit stops sending messages over the bus until the bus becomes idle.

Each module is capable of transmitting and receiving data simultaneously. The typical PCI bus message has the following four components:
- Message Header - One to three bytes in length. The header contains information identifying the message type and length, message priority, target module(s) and sending module.
- Data Byte(s) - This is the actual message that is being sent.
- Cyclic Redundancy Check (CRC) Byte - This byte is used to detect errors during a message transmission.
- In-Frame Response (IFR) byte(s) - If a response is required from the target module(s), it can be sent during this frame. This function is described in greater detail in the following paragraph.

The IFR consists of one or more bytes, which are transmitted during a message. If the sending module requires information to be received immediately, the target module(s) can send data over the bus during the original message. This allows the sending module to receive time-critical information without having to wait for the target module to access the bus. After the IFR is received, the sending module broadcasts an End of Frame (EOF) message and releases control of the bus.

The PCI Bus failure modes are broken down into two categories. Complete PCI Bus Communication Failure and Individual Module No Response. Causes of a complete PCI Bus Communication Failure include a short to ground or battery on the PCI circuit. Individual module no response can be caused by an open circuit at the module, or an open battery or ground circuit to the affected module.

Symptoms of a complete PCI Bus Communication Failure would include but are not limited to:
- All gauges on the MIC stay at zero
- All telltales on MIC illuminate
- MIC backlighting at full intensity
- No response received from any module on the PCI bus (except PCM)
- No start (if equipped with Sentry Key Immobilizer)

Symptoms of Individual module failure could include any one or more of the above. The difference would be that at least one or more modules would respond to the DRB III.

Diagnosis starts with symptom identification. If a complete PCI Bus Communication Failure is suspected, begin by identifying which modules the vehicle is equipped with and then attempt to get a response from the modules with the DRB III. If any modules are responding, the failure is not related to the total bus, but can be caused by one or more modules PCI circuit or power supply and ground circuits. The DRB III may display "BUS +/- SIGNALS OPEN" OR "NO RESPONSE" to indicate a communication problem. These same messages will be displayed if the vehicle is not equipped with that particular module. The CCD error message is a default message used by the DRB III and in no way indicates whether or not the PCI bus is operational. The message is only an indication that a module is either not responding or the vehicle is not equipped.